On-chip parallel processing using tuple space programming and its USB interfacing for reconfigurable computing

This thesis first focuses on the development of a parallel programming paradigm using a Tuple Space. In the tuple space model, parallel processes, called workers, communicate with each other through requests and responses via a logical rendezvous called tuple-space. From the tuple-space's perspective, such requests and responses can be characterized as “a bag-of-tasks”. In this thesis, two different models of task mapping have been investigated. In the first model, each worker process is dedicated to a specific suite of tasks. In the second, every worker can process any task available in the tuple-space. To evaluate the performance of the two models, experiments were conducted on an Intel multi-core computing platform. Such a platform features on-chip multiple processors and cache memory, and high speed share memory access. Thus, the implementation reduces the previously unpredictable communication latencies due to remote memory access through an Ethernet bus [1]. As a result, the experimental study can be focused on the performance gains contributed by the different models of computations. The experiments have been conducted using a benchmark of EIA-41 protocol. The results of the speedups showed the advantages of the parallel processing as multiple cores are used, and automatic load balancing as different task mapping models are investigated.

Another primary focus is the development of a tuple-space client interface using the USB standard for integrating a reconfigurable computing unit to a host computer. Such computing units based on Field Programmable Gated Array (FPGA) technology can be reconfigured in hardware to perform different worker processes for the host. Different algorithms may be mapped to these computing units for load balancing, change of services, and fault tolerance reasons. To fully utilize the available bandwidth of USB (i.e., 480Mbps), a communication protocol was developed in this thesis. The key features include (1) the definition of the format of a USB frame, (2) its timing specification for communication and synchronization, (3) the USB firmware design, and (4) the USB driver and application for Windows system.