Abstract/Details

Chip-level thermal analysis, modeling, and optimization using multilayer Green's function


2008 2008

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Abstract (summary)

With the continual scaling of devices and interconnects, accurate analysis and effective optimization of the temperature distribution of a ULSI chip are increasingly important in predicting and ensuring the performance and reliability of the chip before fabrication. Motivated by the design challenges, this dissertation aims at a detailed study of the areas of thermal analysis, modeling, and optimization of ULSI chips. In particular, this dissertation introduces LOTAGre, a high-efficiency [special characters omitted] (n lg n) multilayer Green's function-based thermal analysis method. LOTAGre can analyze ULSI chips consisting of multilayer heterogeneous heat conduction materials, with either wire-bonding packaging or flip-chip packaging, under uniform or nonuniform ambient temperatures. By integrating the eigen-expansion technique and the transmission line theory, this dissertation derives the multilayer heat conduction Green's function, including the s-domain version which can be used to compute the thermal transfer impedance between two arbitrary locations in the chip and establish compact thermal models for the critical components in the chip.

To aid interconnect thermal analysis, this dissertation introduces a new Schafft-type interconnect temperature distribution model which is very flexible in addressing the effects of chip packaging, surrounding ambient temperatures, and the temperature gradients within the interconnect. An efficient [special characters omitted] (n) method is introduced to solve the interconnect temperature distribution from the model.

To optimize the chip temperature distribution, this dissertation introduces an optimal power budget model that determines the optimal allocation of cell powers to different regions of the chip so that the resultant temperature distribution most closely approximates the target temperature distribution for the chip. The generalized minimal residue method and the conjugate gradient method are employed to construct top-level and front-level thermal optimizers to solve the optimal power budget efficiently. Finally, the dissertation describes the procedure to incorporate the optimal power budget model into the widely distributed Capo placement tool to enable thermal optimization in the cell placement stage.

Indexing (details)


Subject
Electrical engineering;
Computer science
Classification
0544: Electrical engineering
0984: Computer science
Identifier / keyword
Applied sciences; CAD; Green's function; Optimization; Thermal analysis; ULSI
Title
Chip-level thermal analysis, modeling, and optimization using multilayer Green's function
Author
Wang, Baohua
Number of pages
149
Publication year
2008
Degree date
2008
School code
0127
Source
DAI-B 70/01, Dissertation Abstracts International
Place of publication
Ann Arbor
Country of publication
United States
ISBN
9780549994398
Advisor
Mazumder, Pinaki
University/institution
University of Michigan
University location
United States -- Michigan
Degree
Ph.D.
Source type
Dissertations & Theses
Language
English
Document type
Dissertation/Thesis
Dissertation/thesis number
3343244
ProQuest document ID
304576421
Copyright
Database copyright ProQuest LLC; ProQuest does not claim copyright in the individual underlying works.
Document URL
http://search.proquest.com/docview/304576421
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