Stretching silicon: A uniaxial and biaxial strain generation process and the resulting mobility enhancement in silicon -on -insulator MOSFETs
Strained silicon is of technological interest for its ability to increase charge carrier mobilities in MOSFETs and thereby improve circuit performance without requiring device scaling. At high vertical electric fields, biaxial tensile strain enhances electron mobility while uniaxial compressive strain enhances hole mobility, for example.
In the present work, a process is developed to integrate upon a single wafer, for the first time, uniaxially-strained, biaxially-strained and unstrained silicon islands. The ultra-thin (< 30 nm) strained silicon-on-insulator (SOI) layer does not require relaxed silicon germanium buffers. The tensile strain is uniform over large areas (hundreds of μm2). The magnitude of the uniaxial strain depends on its crystal direction and is greater than the biaxial strain, due to the Poisson effect. A maximum uniaxial silicon strain of +1.0% is achieved in the <100> crystal direction.
The strain generation method works by lateral expansion of a silicon/silicon germanium bi-layer island on a viscous borophosphorosilicate glass (BPSG) layer during high temperature (> 700°C) anneal. By manipulating the island geometry from squares to narrow rectangles, biaxial and uniaxial silicon strains are achieved. Numerical simulations of the lateral expansion process for islands of various aspect ratios identify process windows and island geometry requirements for maximum uniaxial strain. The modeled and measured strain results agree well.
An undesired buckling process can roughen the film surface during anneals; the buckling and lateral expansion processes compete to determine the final state of the film. The amplitude of buckling can be reduced and its time scale lengthened by thinning the compliant BPSG layer. Differences in 1-D and 2-D buckling on uniaxially- and biaxially-stressed SiGe islands, respectively, are measured, and by comparison to models, attributed to the different magnitudes of 1-D and 2-D stress present in the films.
Fully-depleted strained-SOI MOSFETs are fabricated using this strain generation process. By adding a silicon nitride barrier layer below the BPSG, device performance is greatly improved. Biaxial tensile strain of 0.38-0.52% enhances electron and hole mobilities by 30-55%. Comparable uniaxial tension parallel to a <100> or <110> channel improves electron mobilities by up to 72% and hole mobilities by up to 54%.
0794: Materials science
0548: Mechanical engineering